[IEEE ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - San Francisco, CA, USA (Feb. 6-10, 2005)] ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. - An 8gb multi-level NAND flash memory with 63nm STI CMOS process technology
Dae-Seok Byeon,, Sung-Soo Lee,, Young-Ho Lim,, Jin-Sung Park,, Wook-Kee Han,, Pan-Suk Kwak,, Dong-Hwan Kim,, Dong-Hyuk Chae,, Seung-Hyun Moon,, Seung-Jae Lee,, Hyun-Chul Cho,, Jung-Woo Lee,Рік:
2005
Мова:
english
DOI:
10.1109/ISSCC.2005.1493861
Файл:
PDF, 207 KB
english, 2005
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