[IEEE 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2017.4.24-2017.4.27)] 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Detailed routing violation prediction during placement using machine learning
Tabrizi, Aysa Fakheri, Darav, Nima Karimpour, Rakai, Logan, Kennings, Andrew, Behjat, LalehРік:
2017
Мова:
english
DOI:
10.1109/VLSI-DAT.2017.7939657
Файл:
PDF, 579 KB
english, 2017
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