[IEEE 2017 Silicon Nanoelectronics Workshop (SNW) - Kyoto (2017.6.4-2017.6.5)] 2017 Silicon Nanoelectronics Workshop (SNW) - Gated-thyristor DRAM cell with pillar channel structure
Kim, Hyungjin, Kwon, Min-Woo, Baek, Myung-Hyun, Hwang, Sungmin, Kim, Sihyun, Jang, Taejin, Lee, Jeong-Jun, Kim, Hyun-Min, Lee, Kitae, Park, Byung-GookРік:
2017
Мова:
english
DOI:
10.23919/SNW.2017.8242302
Файл:
PDF, 1.10 MB
english, 2017
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