A low-jitter all-digital PLL with high-linearity DCO
Lo, Yu-Lung, Wang, Hsi-Hua, Li, Yu-Hsin, Fan, Fang-Yu, Yu, Chun-Yen, Liu, Jen-ChiehМова:
english
Журнал:
Microsystem Technologies
DOI:
10.1007/s00542-018-4252-0
Date:
December, 2018
Файл:
PDF, 1.87 MB
english, 2018